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7493 Binary Counter IC

68

The 7493 specifies that this counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-eight for the 7493A. All of these counters have a gated zero reset and the 7490A also has gated set-to-nine inputs for use in BCD nine’s complement applications.

  • Typical power dissipation: 130mW
  • Count frequency: 42 MHz
  • Choice of Counting Modes . . . BCD, Bi-Quinary, Divide-by-Twelve, Binary
  • Input Clamp Diodes Limit High Speed Termination Effects

The 74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section.74LS93 is  divide-by-eight section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP) to form BCD, bi-quinary, modulo-12, or modulo-16 counters.

 


Pin Description

Pin Symbol Description
1 CP1 clock input, 2nd, 3rd and 4th section (high-to-low edge-triggered)
2 MR1 asynchronous master reset
3 MR2 asynchronous master reset
4 NC no connection
5 Vcc supply voltage
6 NC no connection
7 NC no connection
8 Q2 counter output
9 Q1 counter output
10 GND ground
11 Q3 counter output
12 Q0 counter output
13 NC no connection
14 CP0 clock input, 1st section (high-to-low edge-triggered)

The 7493 specifies that this counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-eight for the 7493A. All of these counters have a gated zero reset and the 7490A also has gated set-to-nine inputs for use in BCD nine’s complement applications.

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